Static Call Graph for image .\uart_simulator_14t\uart_simulator_14t.axf

Function Pointers

• ACMP0_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• ACMP1_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• ACMP2_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• ACMP3_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• ADC0_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• ADC1_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• BaseTimer0_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• BaseTimer1_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• BusFault_Handler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• CAN_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• DMA_IRQHandler from kpm32xx_it.o(i.DMA_IRQHandler) referenced from startup_kpm32x14xx.o(RESET)
• FLASH_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• HardFault_Handler from kpm32xx_it.o(i.HardFault_Handler) referenced from startup_kpm32x14xx.o(RESET)
• I2C0_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• I2C1_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• IOPort_INTP0_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• IOPort_INTP10_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• IOPort_INTP11_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• IOPort_INTP12_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• IOPort_INTP13_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• IOPort_INTP14_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• IOPort_INTP15_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• IOPort_INTP1_IRQHandler from kpm32xx_it.o(i.IOPort_INTP1_IRQHandler) referenced from startup_kpm32x14xx.o(RESET)
• IOPort_INTP2_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• IOPort_INTP3_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• IOPort_INTP4_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• IOPort_INTP5_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• IOPort_INTP6_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• IOPort_INTP7_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• IOPort_INTP8_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• IOPort_INTP9_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• IOW_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• LVD_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• MemManage_Handler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• NMI_Handler from kpm32xx_it.o(i.NMI_Handler) referenced from startup_kpm32x14xx.o(RESET)
• PendSV_Handler from kpm32xx_it.o(i.PendSV_Handler) referenced from startup_kpm32x14xx.o(RESET)
• RESERVED_15_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• RESERVED_2_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• RESERVED_6_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• RESERVED_8_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• Reset_Handler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• SCI0_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• SCI1_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• SCI2_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• SPI_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• SVC_Handler from kpm32xx_it.o(i.SVC_Handler) referenced from startup_kpm32x14xx.o(RESET)
• SysTick_Handler from kpm32xx_it.o(i.SysTick_Handler) referenced from startup_kpm32x14xx.o(RESET)
• SystemInit from system_kpm32xx.o(i.SystemInit) referenced from startup_kpm32x14xx.o(.ARM.__at_0x08000400)
• TIMA0_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• TIMA1_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• TIMG0_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• TIMG1_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• TIMG2_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• TIMH0_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• TIMH1_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• TIMH2_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• TIMS0_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• TIMS1_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• TIMS2_IRQHandler from kpm32xx_it.o(i.TIMS2_IRQHandler) referenced from startup_kpm32x14xx.o(RESET)
• TIMS3_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• UsageFault_Handler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• WWDG_IRQHandler from startup_kpm32x14xx.o(.ARM.__at_0x08000400) referenced from startup_kpm32x14xx.o(RESET)
• __main from entry.o(.ARM.Collect$$$$00000000) referenced from startup_kpm32x14xx.o(.ARM.__at_0x08000400)
• main from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)

Global Symbols

__main (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(.ARM.__at_0x08000400)

_main_stk (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))

_main_scatterload (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))

[Calls]

• >>   __scatterload

__main_after_scatterload (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))

[Called By]

• >>   __scatterload

_main_clock (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))

_main_cpp_init (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))

_main_init (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))

__rt_final_cpp (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000D))

__rt_final_exit (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$0000000F))

__aeabi_memset (Thumb, 14 bytes, Stack size 0 bytes, memseta.o(.text))

[Called By]

• >>   _memset$wrapper
• >>   __aeabi_memclr

__aeabi_memset4 (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

__aeabi_memset8 (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

__aeabi_memclr (Thumb, 4 bytes, Stack size 0 bytes, memseta.o(.text))

[Calls]

• >>   __aeabi_memset

• >>   uart_data_receive

__aeabi_memclr4 (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text))

[Called By]

• >>   dma_trans_rx

__aeabi_memclr8 (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

_memset$wrapper (Thumb, 18 bytes, Stack size 8 bytes, memseta.o(.text), UNUSED)

[Calls]

• >>   __aeabi_memset

__scatterload (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))

[Calls]

• >>   __main_after_scatterload

• >>   _main_scatterload

__scatterload_rt2 (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)

BTM00_16bit_Init (Thumb, 50 bytes, Stack size 16 bytes, simulator_uart_driver.o(i.BTM00_16bit_Init))

[Stack]

• Max Depth = 24
• Call Chain = BTM00_16bit_Init ⇒ DDL_BTM_Init

• >>   DDL_BTM_StructInit
• >>   DDL_BTM_Start
• >>   DDL_BTM_IntEnable
• >>   DDL_BTM_Instance_Active
• >>   DDL_BTM_Init

• >>   main

DDL_BTM_Init (Thumb, 60 bytes, Stack size 8 bytes, kpm32xx_ddl_basetimer.o(i.DDL_BTM_Init))

[Stack]

• Max Depth = 8
• Call Chain = DDL_BTM_Init

• >>   BTM00_16bit_Init

DDL_BTM_Instance_Active (Thumb, 30 bytes, Stack size 0 bytes, kpm32xx_ddl_basetimer.o(i.DDL_BTM_Instance_Active))

[Called By]

• >>   BTM00_16bit_Init

DDL_BTM_IntEnable (Thumb, 10 bytes, Stack size 0 bytes, kpm32xx_ddl_basetimer.o(i.DDL_BTM_IntEnable))

[Called By]

• >>   BTM00_16bit_Init

DDL_BTM_Start (Thumb, 10 bytes, Stack size 0 bytes, kpm32xx_ddl_basetimer.o(i.DDL_BTM_Start))

[Called By]

• >>   BTM00_16bit_Init

DDL_BTM_StructInit (Thumb, 14 bytes, Stack size 0 bytes, kpm32xx_ddl_basetimer.o(i.DDL_BTM_StructInit))

[Called By]

• >>   BTM00_16bit_Init

DDL_DCACHE_Disable (Thumb, 30 bytes, Stack size 0 bytes, kpm32xx_ddl_flash.o(i.DDL_DCACHE_Disable))

[Called By]

• >>   DDL_DCACHE_Init

DDL_DCACHE_Enable (Thumb, 30 bytes, Stack size 0 bytes, kpm32xx_ddl_flash.o(i.DDL_DCACHE_Enable))

[Called By]

• >>   DDL_DCACHE_Init

DDL_DCACHE_Init (Thumb, 46 bytes, Stack size 4 bytes, kpm32xx_ddl_flash.o(i.DDL_DCACHE_Init))

[Stack]

• Max Depth = 4
• Call Chain = DDL_DCACHE_Init

• >>   DDL_DCACHE_Enable
• >>   DDL_DCACHE_Disable

• >>   DDL_RCC_ClkSrcConfig

DDL_DMA_ChannelStart (Thumb, 156 bytes, Stack size 16 bytes, kpm32xx_ddl_dma.o(i.DDL_DMA_ChannelStart))

[Stack]

• Max Depth = 16
• Call Chain = DDL_DMA_ChannelStart

• >>   dma_trans_tx
• >>   dma_trans_rx

DDL_DMA_ChannelStructInit (Thumb, 30 bytes, Stack size 0 bytes, kpm32xx_ddl_dma.o(i.DDL_DMA_ChannelStructInit))

[Called By]

• >>   dma_init

DDL_DMA_Init (Thumb, 18 bytes, Stack size 0 bytes, kpm32xx_ddl_dma.o(i.DDL_DMA_Init))

[Called By]

• >>   dma_init

DDL_DMA_IntEnable (Thumb, 18 bytes, Stack size 0 bytes, kpm32xx_ddl_dma.o(i.DDL_DMA_IntEnable))

[Called By]

• >>   dma_init

DDL_EBUS_Init (Thumb, 44 bytes, Stack size 8 bytes, kpm32xx_ddl_ebus.o(i.DDL_EBUS_Init))

[Stack]

• Max Depth = 8
• Call Chain = DDL_EBUS_Init

• >>   ebus_init

DDL_EBUS_Instance_Active (Thumb, 30 bytes, Stack size 0 bytes, kpm32xx_ddl_ebus.o(i.DDL_EBUS_Instance_Active))

[Called By]

• >>   ebus_init

DDL_FLASH_Lock (Thumb, 14 bytes, Stack size 0 bytes, kpm32xx_ddl_flash.o(i.DDL_FLASH_Lock))

[Called By]

• >>   DDL_RCC_ClkSrcConfig

HardFault_Handler (Thumb, 4 bytes, Stack size 0 bytes, kpm32xx_it.o(i.HardFault_Handler))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

Reset_Handler (Thumb, 8 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

MemManage_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))

[Calls]

• >>   MemManage_Handler

• >>   MemManage_Handler

• startup_kpm32x14xx.o(RESET)

BusFault_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))

[Calls]

• >>   BusFault_Handler

• >>   BusFault_Handler

• startup_kpm32x14xx.o(RESET)

UsageFault_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))

[Calls]

• >>   UsageFault_Handler

• >>   UsageFault_Handler

• startup_kpm32x14xx.o(RESET)

ACMP0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))

[Calls]

• >>   ACMP0_IRQHandler

• >>   ACMP0_IRQHandler

• startup_kpm32x14xx.o(RESET)

ACMP1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

ACMP2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

ACMP3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

ADC0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

ADC1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

BaseTimer0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

BaseTimer1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

CAN_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

FLASH_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

I2C0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

I2C1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

IOPort_INTP0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

IOPort_INTP10_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

IOPort_INTP11_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

IOPort_INTP12_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

IOPort_INTP13_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

IOPort_INTP14_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

IOPort_INTP15_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

IOPort_INTP2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

IOPort_INTP3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

IOPort_INTP4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

IOPort_INTP5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

IOPort_INTP6_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

IOPort_INTP7_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

IOPort_INTP8_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

IOPort_INTP9_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

IOW_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

LVD_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

RESERVED_15_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

RESERVED_2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

RESERVED_6_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

RESERVED_8_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

SCI0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

SCI1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

SCI2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

SPI_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

TIMA0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

TIMA1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

TIMG0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

TIMG1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

TIMG2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

TIMH0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

TIMH1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

TIMH2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

TIMS0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

TIMS1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

TIMS3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

WWDG_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_kpm32x14xx.o(.ARM.__at_0x08000400))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

DDL_DMA_SetChannelConfig (Thumb, 176 bytes, Stack size 32 bytes, kpm32xx_ddl_dma.o(i.DDL_DMA_SetChannelConfig))

[Stack]

• Max Depth = 32
• Call Chain = DDL_DMA_SetChannelConfig

• >>   DMA_CalcChannelBaseAddr

• >>   dma_trans_tx
• >>   dma_trans_rx

DDL_EBUS_StructInit (Thumb, 32 bytes, Stack size 0 bytes, kpm32xx_ddl_ebus.o(i.DDL_EBUS_StructInit))

[Called By]

• >>   ebus_init

DDL_FLASH_SetLatency (Thumb, 16 bytes, Stack size 0 bytes, kpm32xx_ddl_flash.o(i.DDL_FLASH_SetLatency))

[Called By]

• >>   DDL_RCC_ClkSrcConfig

DDL_FLASH_Unlock (Thumb, 8 bytes, Stack size 0 bytes, kpm32xx_ddl_flash.o(i.DDL_FLASH_Unlock))

[Called By]

• >>   DDL_RCC_ClkSrcConfig

DDL_GPIO_Config2Input (Thumb, 162 bytes, Stack size 32 bytes, kpm32xx_ddl_gpio.o(i.DDL_GPIO_Config2Input))

[Stack]

• Max Depth = 32
• Call Chain = DDL_GPIO_Config2Input

• >>   GPIO_GetPortIndex
• >>   GPIO_GetPinIndex

• >>   main

DDL_GPIO_Config2Output (Thumb, 176 bytes, Stack size 40 bytes, kpm32xx_ddl_gpio.o(i.DDL_GPIO_Config2Output))

[Stack]

• Max Depth = 40
• Call Chain = DDL_GPIO_Config2Output

• >>   GPIO_GetPortIndex
• >>   GPIO_GetPinIndex

• >>   main

DDL_GPIO_EBus_Start (Thumb, 58 bytes, Stack size 12 bytes, kpm32xx_ddl_gpio.o(i.DDL_GPIO_EBus_Start))

[Stack]

• Max Depth = 12
• Call Chain = DDL_GPIO_EBus_Start

• >>   ebus_init

DDL_GPIO_Instance_Active (Thumb, 30 bytes, Stack size 0 bytes, kpm32xx_ddl_gpio.o(i.DDL_GPIO_Instance_Active))

[Called By]

• >>   main

DDL_GetTick (Thumb, 6 bytes, Stack size 0 bytes, kpm32xx_ddl.o(i.DDL_GetTick))

[Called By]

• >>   uart_data_receive

DDL_ICACHE_Disable (Thumb, 30 bytes, Stack size 0 bytes, kpm32xx_ddl_flash.o(i.DDL_ICACHE_Disable))

[Called By]

• >>   DDL_ICACHE_Init

DDL_ICACHE_Enable (Thumb, 30 bytes, Stack size 0 bytes, kpm32xx_ddl_flash.o(i.DDL_ICACHE_Enable))

[Called By]

• >>   DDL_ICACHE_Init

DDL_ICACHE_Init (Thumb, 46 bytes, Stack size 4 bytes, kpm32xx_ddl_flash.o(i.DDL_ICACHE_Init))

[Stack]

• Max Depth = 4
• Call Chain = DDL_ICACHE_Init

• >>   DDL_ICACHE_Enable
• >>   DDL_ICACHE_Disable

• >>   DDL_RCC_ClkSrcConfig

DDL_IOPort_ChangeEdgeDetection (Thumb, 24 bytes, Stack size 12 bytes, kpm32xx_ddl_ioport.o(i.DDL_IOPort_ChangeEdgeDetection))

[Stack]

• Max Depth = 12
• Call Chain = DDL_IOPort_ChangeEdgeDetection

• >>   IOPort_INTP1_IRQHandler
• >>   DMA_IRQHandler

DDL_IOPort_Config (Thumb, 66 bytes, Stack size 8 bytes, kpm32xx_ddl_ioport.o(i.DDL_IOPort_Config))

[Stack]

• Max Depth = 8
• Call Chain = DDL_IOPort_Config

• >>   ioport_init

DDL_IOPort_PinInt_Clear (Thumb, 8 bytes, Stack size 0 bytes, kpm32xx_ddl_ioport.o(i.DDL_IOPort_PinInt_Clear))

[Called By]

• >>   IOPort_INTP1_IRQHandler

DDL_IncTick (Thumb, 16 bytes, Stack size 0 bytes, kpm32xx_ddl.o(i.DDL_IncTick))

[Called By]

• >>   SysTick_Handler

DDL_Init (Thumb, 18 bytes, Stack size 8 bytes, kpm32xx_ddl.o(i.DDL_Init))

[Stack]

• Max Depth = 32
• Call Chain = DDL_Init ⇒ DDL_InitTick ⇒ NVIC_SetPriority

• >>   DDL_InitTick

• >>   main

DDL_InitTick (Thumb, 114 bytes, Stack size 16 bytes, kpm32xx_ddl.o(i.DDL_InitTick))

[Stack]

• Max Depth = 24
• Call Chain = DDL_InitTick ⇒ NVIC_SetPriority

• >>   NVIC_SetPriority

• >>   DDL_RCC_ClkSrcConfig
• >>   DDL_Init

DDL_RCC_ClkSrcConfig (Thumb, 226 bytes, Stack size 24 bytes, kpm32xx_ddl_rcc.o(i.DDL_RCC_ClkSrcConfig))

[Stack]

• Max Depth = 56
• Call Chain = DDL_RCC_ClkSrcConfig ⇒ DDL_RCC_GetSysClockFreq ⇒ RCC_Get_PLL_ClockFreq

• >>   DDL_ICACHE_Init
• >>   DDL_FLASH_Unlock
• >>   DDL_FLASH_SetLatency
• >>   DDL_FLASH_Lock
• >>   DDL_DCACHE_Init
• >>   DDL_InitTick
• >>   DDL_RCC_GetSysClockFreq

• >>   SystemClock_Config

DDL_RCC_GetSysClockFreq (Thumb, 62 bytes, Stack size 16 bytes, kpm32xx_ddl_rcc.o(i.DDL_RCC_GetSysClockFreq))

[Stack]

• Max Depth = 32
• Call Chain = DDL_RCC_GetSysClockFreq ⇒ RCC_Get_PLL_ClockFreq

• >>   RCC_Get_PLL_ClockFreq

• >>   DDL_RCC_ClkSrcConfig

DDL_RCC_HircEnable (Thumb, 62 bytes, Stack size 8 bytes, kpm32xx_ddl_rcc.o(i.DDL_RCC_HircEnable))

[Stack]

• Max Depth = 8
• Call Chain = DDL_RCC_HircEnable

• >>   Wait_Clock_Till_Stable

• >>   DDL_RCC_PllConfig

DDL_RCC_HoscEnable (Thumb, 100 bytes, Stack size 8 bytes, kpm32xx_ddl_rcc.o(i.DDL_RCC_HoscEnable))

[Stack]

• Max Depth = 8
• Call Chain = DDL_RCC_HoscEnable

• >>   Wait_Clock_Till_Stable

• >>   DDL_RCC_PllConfig

DDL_RCC_PllConfig (Thumb, 52 bytes, Stack size 16 bytes, kpm32xx_ddl_rcc.o(i.DDL_RCC_PllConfig))

[Stack]

• Max Depth = 24
• Call Chain = DDL_RCC_PllConfig ⇒ DDL_RCC_HoscEnable

• >>   DDL_RCC_HoscEnable
• >>   DDL_RCC_HircEnable
• >>   DDL_RCC_PllEnable

• >>   SystemClock_Config

DDL_RCC_PllStructInit (Thumb, 16 bytes, Stack size 0 bytes, kpm32xx_ddl_rcc.o(i.DDL_RCC_PllStructInit))

[Called By]

• >>   SystemClock_Config

DDL_TIMS_AsMaster_Trgo (Thumb, 12 bytes, Stack size 0 bytes, kpm32xx_ddl_tims.o(i.DDL_TIMS_AsMaster_Trgo))

[Called By]

• >>   tims_pwm_init

DDL_TIMS_Ch1_BrkIdelState_Config (Thumb, 20 bytes, Stack size 8 bytes, kpm32xx_ddl_tims.o(i.DDL_TIMS_Ch1_BrkIdelState_Config))

[Stack]

• Max Depth = 8
• Call Chain = DDL_TIMS_Ch1_BrkIdelState_Config

• >>   tims_pwm_init

DDL_TIMS_Ch1_Duty_Config (Thumb, 16 bytes, Stack size 0 bytes, kpm32xx_ddl_tims.o(i.DDL_TIMS_Ch1_Duty_Config))

[Called By]

• >>   tims_pwm_init

DDL_TIMS_Ch1_HighResistsnceState_Config (Thumb, 20 bytes, Stack size 8 bytes, kpm32xx_ddl_tims.o(i.DDL_TIMS_Ch1_HighResistsnceState_Config))

[Stack]

• Max Depth = 8
• Call Chain = DDL_TIMS_Ch1_HighResistsnceState_Config

• >>   tims_pwm_init

DDL_TIMS_Ch1_PWM_Mode_Config (Thumb, 14 bytes, Stack size 0 bytes, kpm32xx_ddl_tims.o(i.DDL_TIMS_Ch1_PWM_Mode_Config))

[Called By]

• >>   tims_pwm_init

DDL_TIMS_Instance_Active (Thumb, 144 bytes, Stack size 0 bytes, kpm32xx_ddl_tims.o(i.DDL_TIMS_Instance_Active))

[Called By]

• >>   tims_pwm_init

DDL_TIMS_IntEnable (Thumb, 12 bytes, Stack size 0 bytes, kpm32xx_ddl_tims.o(i.DDL_TIMS_IntEnable))

[Called By]

• >>   tims_pwm_init

DDL_TIMS_PWM_Enable (Thumb, 8 bytes, Stack size 0 bytes, kpm32xx_ddl_tims.o(i.DDL_TIMS_PWM_Enable))

[Called By]

• >>   tims_pwm_init

DDL_TIMS_PWM_Init (Thumb, 28 bytes, Stack size 0 bytes, kpm32xx_ddl_tims.o(i.DDL_TIMS_PWM_Init))

[Called By]

• >>   tims_pwm_init

DDL_TIMS_PWM_StructInit (Thumb, 20 bytes, Stack size 0 bytes, kpm32xx_ddl_tims.o(i.DDL_TIMS_PWM_StructInit))

[Called By]

• >>   tims_pwm_init

DMA_IRQHandler (Thumb, 88 bytes, Stack size 8 bytes, kpm32xx_it.o(i.DMA_IRQHandler))

[Stack]

• Max Depth = 20
• Call Chain = DMA_IRQHandler ⇒ DDL_IOPort_ChangeEdgeDetection

• >>   DDL_IOPort_ChangeEdgeDetection

• startup_kpm32x14xx.o(RESET)

IOPort_INTP1_IRQHandler (Thumb, 60 bytes, Stack size 8 bytes, kpm32xx_it.o(i.IOPort_INTP1_IRQHandler))

[Stack]

• Max Depth = 20
• Call Chain = IOPort_INTP1_IRQHandler ⇒ DDL_IOPort_ChangeEdgeDetection

• >>   DDL_IOPort_PinInt_Clear
• >>   DDL_IOPort_ChangeEdgeDetection

• startup_kpm32x14xx.o(RESET)

NMI_Handler (Thumb, 2 bytes, Stack size 0 bytes, kpm32xx_it.o(i.NMI_Handler))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

PendSV_Handler (Thumb, 2 bytes, Stack size 0 bytes, kpm32xx_it.o(i.PendSV_Handler))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

SVC_Handler (Thumb, 2 bytes, Stack size 0 bytes, kpm32xx_it.o(i.SVC_Handler))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

SysTick_Handler (Thumb, 8 bytes, Stack size 8 bytes, kpm32xx_it.o(i.SysTick_Handler))

[Stack]

• Max Depth = 8
• Call Chain = SysTick_Handler

• >>   DDL_IncTick

• startup_kpm32x14xx.o(RESET)

SystemClock_Config (Thumb, 64 bytes, Stack size 32 bytes, main.o(i.SystemClock_Config))

[Stack]

• Max Depth = 88
• Call Chain = SystemClock_Config ⇒ DDL_RCC_ClkSrcConfig ⇒ DDL_RCC_GetSysClockFreq ⇒ RCC_Get_PLL_ClockFreq

• >>   DDL_RCC_PllStructInit
• >>   DDL_RCC_PllConfig
• >>   DDL_RCC_ClkSrcConfig

• >>   main

SystemInit (Thumb, 24 bytes, Stack size 0 bytes, system_kpm32xx.o(i.SystemInit))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(.ARM.__at_0x08000400)

TIMS2_IRQHandler (Thumb, 28 bytes, Stack size 0 bytes, kpm32xx_it.o(i.TIMS2_IRQHandler))
[Address Reference Count : 1]

• startup_kpm32x14xx.o(RESET)

__scatterload_copy (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)

__scatterload_null (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)

__scatterload_zeroinit (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)

dma_init (Thumb, 74 bytes, Stack size 8 bytes, simulator_uart_driver.o(i.dma_init))

[Stack]

• Max Depth = 16
• Call Chain = dma_init ⇒ NVIC_SetPriority

• >>   DDL_DMA_IntEnable
• >>   DDL_DMA_Init
• >>   DDL_DMA_ChannelStructInit
• >>   NVIC_SetPriority
• >>   NVIC_EnableIRQ

• >>   main

dma_trans_rx (Thumb, 60 bytes, Stack size 8 bytes, simulator_uart_driver.o(i.dma_trans_rx))

[Stack]

• Max Depth = 40
• Call Chain = dma_trans_rx ⇒ DDL_DMA_SetChannelConfig

• >>   DDL_DMA_SetChannelConfig
• >>   DDL_DMA_ChannelStart
• >>   __aeabi_memclr4

• >>   simulator_uart_rx
• >>   uart_init

dma_trans_tx (Thumb, 58 bytes, Stack size 8 bytes, simulator_uart_driver.o(i.dma_trans_tx))

[Stack]

• Max Depth = 40
• Call Chain = dma_trans_tx ⇒ DDL_DMA_SetChannelConfig

• >>   DDL_DMA_SetChannelConfig
• >>   DDL_DMA_ChannelStart

• >>   simulator_uart_tx

ebus_init (Thumb, 120 bytes, Stack size 8 bytes, simulator_uart_driver.o(i.ebus_init))

[Stack]

• Max Depth = 20
• Call Chain = ebus_init ⇒ DDL_GPIO_EBus_Start

• >>   DDL_GPIO_EBus_Start
• >>   DDL_EBUS_StructInit
• >>   DDL_EBUS_Instance_Active
• >>   DDL_EBUS_Init

• >>   main

ioport_init (Thumb, 70 bytes, Stack size 24 bytes, simulator_uart_driver.o(i.ioport_init))

[Stack]

• Max Depth = 32
• Call Chain = ioport_init ⇒ DDL_IOPort_Config

• >>   DDL_IOPort_Config
• >>   NVIC_SetPriority
• >>   NVIC_EnableIRQ

• >>   main

main (Thumb, 108 bytes, Stack size 0 bytes, main.o(i.main))

[Stack]

• Max Depth = 88
• Call Chain = main ⇒ SystemClock_Config ⇒ DDL_RCC_ClkSrcConfig ⇒ DDL_RCC_GetSysClockFreq ⇒ RCC_Get_PLL_ClockFreq

• >>   uart_init
• >>   uart_data_send
• >>   uart_data_receive
• >>   tims_pwm_init
• >>   ioport_init
• >>   ebus_init
• >>   dma_init
• >>   DDL_Init
• >>   DDL_GPIO_Instance_Active
• >>   DDL_GPIO_Config2Output
• >>   DDL_GPIO_Config2Input
• >>   BTM00_16bit_Init
• >>   SystemClock_Config

• entry9a.o(.ARM.Collect$$$$0000000B)

simulator_uart_rx (Thumb, 174 bytes, Stack size 16 bytes, simulator_uart_app.o(i.simulator_uart_rx))

[Stack]

• Max Depth = 56
• Call Chain = simulator_uart_rx ⇒ dma_trans_rx ⇒ DDL_DMA_SetChannelConfig

• >>   dma_trans_rx

• >>   uart_data_receive

simulator_uart_tx (Thumb, 388 bytes, Stack size 24 bytes, simulator_uart_app.o(i.simulator_uart_tx))

[Stack]

• Max Depth = 64
• Call Chain = simulator_uart_tx ⇒ dma_trans_tx ⇒ DDL_DMA_SetChannelConfig

• >>   dma_trans_tx

• >>   uart_data_send

tims_pwm_init (Thumb, 134 bytes, Stack size 24 bytes, simulator_uart_driver.o(i.tims_pwm_init))

[Stack]

• Max Depth = 32
• Call Chain = tims_pwm_init ⇒ DDL_TIMS_Ch1_HighResistsnceState_Config

• >>   DDL_TIMS_PWM_StructInit
• >>   DDL_TIMS_PWM_Init
• >>   DDL_TIMS_PWM_Enable
• >>   DDL_TIMS_IntEnable
• >>   DDL_TIMS_Instance_Active
• >>   DDL_TIMS_Ch1_PWM_Mode_Config
• >>   DDL_TIMS_Ch1_HighResistsnceState_Config
• >>   DDL_TIMS_Ch1_Duty_Config
• >>   DDL_TIMS_Ch1_BrkIdelState_Config
• >>   DDL_TIMS_AsMaster_Trgo
• >>   NVIC_SetPriority
• >>   NVIC_EnableIRQ

• >>   main

uart_data_receive (Thumb, 108 bytes, Stack size 24 bytes, simulator_uart_app.o(i.uart_data_receive))

[Stack]

• Max Depth = 80
• Call Chain = uart_data_receive ⇒ simulator_uart_rx ⇒ dma_trans_rx ⇒ DDL_DMA_SetChannelConfig

• >>   DDL_GetTick
• >>   simulator_uart_rx
• >>   __aeabi_memclr

• >>   main

uart_data_send (Thumb, 92 bytes, Stack size 16 bytes, simulator_uart_app.o(i.uart_data_send))

[Stack]

• Max Depth = 80
• Call Chain = uart_data_send ⇒ simulator_uart_tx ⇒ dma_trans_tx ⇒ DDL_DMA_SetChannelConfig

• >>   simulator_uart_tx

• >>   main

uart_init (Thumb, 42 bytes, Stack size 8 bytes, simulator_uart_app.o(i.uart_init))

[Stack]

• Max Depth = 48
• Call Chain = uart_init ⇒ dma_trans_rx ⇒ DDL_DMA_SetChannelConfig

• >>   dma_trans_rx

• >>   main

Local Symbols

NVIC_EnableIRQ (Thumb, 22 bytes, Stack size 0 bytes, simulator_uart_driver.o(i.NVIC_EnableIRQ))

[Called By]

• >>   tims_pwm_init
• >>   ioport_init
• >>   dma_init

NVIC_SetPriority (Thumb, 32 bytes, Stack size 8 bytes, simulator_uart_driver.o(i.NVIC_SetPriority))

[Stack]

• Max Depth = 8
• Call Chain = NVIC_SetPriority

• >>   tims_pwm_init
• >>   ioport_init
• >>   dma_init

NVIC_SetPriority (Thumb, 32 bytes, Stack size 8 bytes, kpm32xx_ddl.o(i.NVIC_SetPriority))

[Stack]

• Max Depth = 8
• Call Chain = NVIC_SetPriority

• >>   DDL_InitTick

GPIO_GetPinIndex (Thumb, 28 bytes, Stack size 0 bytes, kpm32xx_ddl_gpio.o(i.GPIO_GetPinIndex))

[Called By]

• >>   DDL_GPIO_Config2Output
• >>   DDL_GPIO_Config2Input

GPIO_GetPortIndex (Thumb, 10 bytes, Stack size 0 bytes, kpm32xx_ddl_gpio.o(i.GPIO_GetPortIndex))

[Called By]

• >>   DDL_GPIO_Config2Output
• >>   DDL_GPIO_Config2Input

DDL_RCC_PllEnable (Thumb, 116 bytes, Stack size 8 bytes, kpm32xx_ddl_rcc.o(i.DDL_RCC_PllEnable))

[Stack]

• Max Depth = 8
• Call Chain = DDL_RCC_PllEnable

• >>   Wait_Clock_Till_Stable

• >>   DDL_RCC_PllConfig

RCC_Get_PLL_ClockFreq (Thumb, 74 bytes, Stack size 16 bytes, kpm32xx_ddl_rcc.o(i.RCC_Get_PLL_ClockFreq))

[Stack]

• Max Depth = 16
• Call Chain = RCC_Get_PLL_ClockFreq

• >>   DDL_RCC_GetSysClockFreq

Wait_Clock_Till_Stable (Thumb, 38 bytes, Stack size 0 bytes, kpm32xx_ddl_rcc.o(i.Wait_Clock_Till_Stable))

[Called By]

• >>   DDL_RCC_HoscEnable
• >>   DDL_RCC_HircEnable
• >>   DDL_RCC_PllEnable

DMA_CalcChannelBaseAddr (Thumb, 12 bytes, Stack size 0 bytes, kpm32xx_ddl_dma.o(i.DMA_CalcChannelBaseAddr))

[Called By]

• >>   DDL_DMA_SetChannelConfig

Undefined Global Symbols